1. Field of the Invention
The present invention relates to a transceiver, and more particularly, to a transceiver in a full duplex communication system.
2. Description of the Prior Art
As technology advances, network applications have become more and more popular. Network bandwidth requirements are also increasing as the transmission speed of data transmission standards such as Ethernet have raised from 10/110 Mps to above 1 Gbps. As is well known in the art, each port of a 1 Gbps gigabit Ethernet device has four channels, wherein each of the four channels has a transceiver.
Please refer to FIG. 1, which depicts a simplified schematic diagram of a conventional transceiver 100 in a channel of a gigabit Ethernet device. In general, the transceiver 100 is coupled to a twisted pair 118 via a line interface 116. As shown in FIG. 1, the transceiver 100 comprises a transmitter section 104 and a receiver section 106. The transmitter section 104 has a digital-to-analog converter (DAC) 108 for converting a transmit signal (a near-end signal) into analog form. The analog transmit signal is then transmitted to a far-end network device via the line interface 116 and the twisted pair 118. The receiver section 106 has an analog-front-end (AFE) circuit for processing a receive signal (a far-end signal) received from the line interface 116, and an analog-to-digital converter (ADC) 114 for converting the processed signals into digital form. The digital signal is then sent to following stages for further processing. The gigabit Ethernet device and the far-end network device both simultaneously utilize four channels where each channel simultaneously performs transmitting and receiving operations. As a result, the gigabit Ethernet device is a full duplex communication system.
As mentioned above, each channel of the gigabit Ethernet device simultaneously performs transmitting and receiving operations. When the channel is transmitting, the signals received from the channel are affected by the transmission, and this phenomenon is known as echo impairment. In order to reduce echo impairment in a communication system, an echo cancellation device 110 and an echo cancellation resistor Rp are usually employed in the conventional transceiver 100. The echo cancellation device 110 is usually a DAC for generating a cancellation signal that corresponds to the transmit signal output from the DAC 108 in order to cancel the effects of the transmit signal on the receiver section 106 and thereby achieve echo cancellation.
However, the unavoidable parasitic capacitance effect in practical implementations is not considered in the echo cancellation device 110 of the prior art. Therefore, the echo effect of the transceiver 100 cannot be effectively reduced to the lowest level using the echo cancellation device 110 and thereby results in echo residue on the receiver section 106.